The invention relates to a semiconductor imager device being arranged for receiving a series of charge packets, comprising a charge-to-voltage conversion circuit arranged for receiving said charge packets on a reception capacitance, and having an interconnected arrangement of a floating diffusion, a first reset gate, a reset drain and a source follower for readout, as being recited in the preamble of claim 1. In particular, for high-speed operation, the reset gate transistor should be as small as reasonably feasible.
Now, various imaging applications would benefit from a facility that allows switching between different conversion gain values, in particular, between high values and low values, such being effected by switching the capacitance of the floating diffusion node instead of by switching the gain factor of the amplifier.